In the field of chemical vapor deposition (CVD) of silicon-containing epitaxial layers, the trend is towards a reduction in the deposition temperature of the CVD process primarily due to the decreasing thermal budget required for the fabrication of state of the art semiconductor device structures, such as, for example, complementary metal-oxide-semiconductor (CMOS) device structures.
The reduction in the growth temperature for CVD processes may limit the growth rate of silicon-containing epitaxial layers and hence the throughput of semiconductor device wafers through the semiconductor deposition equipment. In addition, the reduction in the growth temperature of CVD processes may also limit the concentration of dopant species incorporated in the silicon-containing epitaxial layers, which may in turn have a detrimental effect on the semiconductor device performance.
Cyclic deposition and etching processes (CDE) may be utilized for low temperature deposition with favorable growth rates and selectivity. However, CVD processes which do not utilize a CDE process may be desirable which are capable of depositing silicon-containing epitaxial layers at reduced deposition temperatures with an increased incorporation of specific dopants.